Extend/Truncate

Found in Wiring Library

Behavior

Extend/Truncate changes the width of a value, either truncating it to have fewer bits, or extending it to have more bits, depending on the Input Bits and Output Bits properties.

Truncate - When there are fewer Output Bits than Input Bits, the output is formed by taking the input value and discarding some of the most significant (i.e. "leftmost") bits. For example, when truncating from 8-bits to 4 bits, if the input is 0x4a (or 0100 1010 in binary) then the output will be 0xa (or 1010 in binary).

Extend - When there are more Output Bits than Input Bits, the output is formed by taking the input value, retaining all of those bits, and placing new bits to the "left" of them, so the new bits are now in the most significant (i.e. "leftmost") positions. The Operation property specifies what the new input bits will be:

• zero-extend - The new bits are all zeros. This is appropriate for unsigned values.
• one-extend - The new bits are all ones. This isn't commonly used.
• sign-extend - The new bits are copies of the leftmost bit of the input. This is appropriiate for signed two's complement values.
• input-extend - The new bits are specified by an additional 1-bit input. This isn't commonly used.

No-op - If there are the same number of Output Bits and Input Bits, this component does nothing useful: the output mirrors the input.

Ports

The input and output ports, on the east and west edges, are labeled with their width. When Operation is set to input-extend, a third port is present on the north edge, a 1-bit input to specify what the new bits will be.

Keyboard Shortcuts

• Arrow keys change the Facing property.
• Typing a number (1-32) changes the Input Bits property.
• Typing a number (1-32) while holding the option key (⌥) or Alt key changes the Output Bits property.

Properties

Facing

The side where the output should be.

Input Bits

The number of bits in the input value.

Output Bits

The number of bits in the output.

Operation

When extending, controls how the new bits are determined.

• zero-extend: New bits are zeros.
• one-extend: New bits are ones.
• sign-extend: New bits are copies of the input's most significant (leftmost) bit.
• input-extend: New bits are copies of the value present at the second input port.

Poke Tool Behavior

None - extend/truncate components do not respond to being poked.

FPGA Synthesis

Supports VHDL and Verilog synthesis.