Transistor

Library:	Analog
Introduced:	2.7.0 (moved to Analog in 4.0.2 HC)
Appearance:

Behavior

A transistor has two inputs, called gate and source, and one output, called drain. When diagrammed, the source input and drain output are drawn connected by a plate; Logisim draws an arrowhead to indicate the direction of data flow from input to output. The gate input is drawn connected to a plate that is parallel to the plate connecting source to drain. Logisim supports two types of transistors, with slightly different behaviors described below; the P-type transistor is indicated by a circle connecting the gate input to its plate, while the N-type transistor has no such circle. Note: these components roughly approximate the behavior of actual FET transistors, but several simplifications are made.

Depending on the value found at gate, the value at source may be transmitted to drain; or there may be no connection from source, so drain is left floating (shown as 'X'). The determination of transmitting or disconnecting depends on the type of transistor: A P-type transistor (indicated by a circle on the gate line) transmits when gate is 0, while an N-type transistor (which has no such circle) transmits when gate is 1. For a P-type transistor, a high source input will propagate to the drain output, while for an N-type transistor, a low source input will propagate to the drain output. Other source values will leave drain floating (shown as 'X'). Error values (shown as 'E') cause the transistor to output errors or, in some cases, floating ('X') values.

	P-type

		gate
		0	1	E/X
	0	X	X	E
source	1	1	X	E
	X	X	X	X
	E	E	X	E

	N-type

		gate
		0	1	E/X
	0	X	0	E
source	1	X	X	E
	X	X	X	X
	E	X	E	E

Or in summarized form:

P-type

gate	source	drain
0	0	X
0	1	1
1	-	X
E/X	-	E/X*

N-type

gate	source	drain
0	-	X
1	0	0
1	1	X
E/X	-	E/X*

* Note: If source is X, drain is X; otherwise drain is E.

Note: Transistors in logisim only transmit values in one direction, from source to drain, as indicated by the small arrow. This is not realistic for many types of transistor logic, which can be symmetric devices allowing current to flow in either direction depending on how the inputs are wired.

If the Data Bits property is more than 1, the gate input is still a single bit, but its value is applied simultaneously to each of the source input's bits.

An N-type transistor behaves very similarly to a Tri-State Buffer, but it only transmits low source values. A P-type transistor behaves very similarly to a Tri-State Buffer as well, but it only transmits high source values. A pair of N-type and P-type transistors connected together in parallel will function similarly to a single Controlled Buffer, passing both ones and zeros when enabled, and with a floating output when disabled.

Pins (assuming component faces east, gate line top/left)

West edge (input, bit width matches Data Bits property): The component's source input that will transmit to the output if triggered by the gate input.
North edge (input, bit width 1): The component's gate input. For P-type transistors, the transistor will transmit if the gate value is 0; for N-type transistors, this will trigger the transistor if the gate value is 1.
East edge (output, bit width matches Data Bits property): The component's output, which will match the source input if indicated by the gate input, or will be floating if the gate input is the negation of what indicates negation. If gate is floating or an error value, then the output will be an error value.

Properties

When the component is selected or being added, Alt-0 through Alt-9 alter its Data Bits property and the arrow keys alter its Facing property.

Type: Determines whether the transistor is P-type or N-type.
Facing: The direction of the component (its output relative to its input).
Gate Location: The location of the gate input.
Data Bits: The bit width of the component's inputs and outputs.

Poke Tool Behavior

None.

FPGA Synthesis

None. FPGA devices generally do not support tri-state devices.

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