Tri-State Buffer & Tri-State Inverter
| Library: |
Gates |
| Introduced: |
2.0 Beta 1 |
| Appearance: |
 |
Behavior
The tri-state buffer and tri-state inverter, sometimes called controlled
buffers/inverters, each have a one-bit "control"
input pin on the south side. The value at this control pin affects how
the component behaves:
- When the value on the control pin is 1,
then the component behaves just like the respective component, either a buffer or a NOT Gate (a.k.a
"inverter").
- When the control pin value is 0 or unknown (i.e., floating), then the
component's output is floating, regardless of the other input pin.
- When the control pin value is an error value (such as would occur when two
conflicting values are being fed into the input), then the output is an
error value.
Tri-state buffers can be useful when you have a wire (often called a
shared bus) whose value should match the output of one of several
components, each of which is independently controllable by some control signal.
By placing a tri-state buffer between each component
output and the bus, you can control whether that component's output is
fed onto the bus or not.
Pins (assuming component faces east, control line right-handed)
- West edge (input, bit width matches Data Bits property)
- The component input that will be used to compute the output if the
control input is 1.
- South edge (input, bit width 1)
- The component's control input.
- East edge (output, bit width matches Data Bits property)
- The component's output, which will be floating if the control input
is 0 or floating, the error value if the control input is the error
value, and will be computed based on the west-side input if the control
input is 1.
Properties
When the component is selected or being added,
Alt-0 through Alt-9 alter its Data Bits
property
and the arrow keys alter its Facing
property.
- Facing
- The direction of the component (its output relative to its input).
- Data Bits
- The bit width of the component's inputs and outputs.
- Gate Size
- (Tri-state inverter only) Determines whether to draw a larger or a smaller
version of the component.
- Control Line Location
- The location of the control line, imagining we are facing the output
from the input: If the component faces east and is
right-handed,
the control line is to the south; but if it is left-handed,
the control line is to the north.
- Label
- The text within the label associated with the gate.
- Label Font
- The font with which to render the label.
Poke Tool Behavior
None.
FPGA Synthesis
Tri-state devides are not supported for synthesis.
Up to Library Reference