ROM
ROM| Library: | Memory | |||
| Introduced: | 2.1.0 | |||
| Appearance: |
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The ROM component stores up to 16,777,216 values (specified in the Address
Bit Width property), each of which can include up to to 32 bits
(specified in the Data Bit Width property). It behaves similarly to a
RAM with
the 'Non-Volatile' property set, but with a greatly simplified interface: a
circuit can access the current values in ROM, but it cannot change them, so
there is no clock, no control inputs, and there is only one output-only data
bus. The user can modify individual values interactively via the Poke Tool, or
the user can edit, export, or import the contents via the Menu Tool.
The ROM component's contents are stored as a property of the component. This allows the ROM contents to be set before placing the component into the circuit. Multiple ROM components can be kept in the toolbar, each configured with different contents. The contents are non-volatile, and persist across simulation resets or when Logisim exits.
Current values are displayed in the component. Addresses are displayed in hex to the left of the display area. Inside the display area, each value is listed in hex. The value at the currently selected address will be displayed in inverse text (white on dark gray).
Logisim ROM has a 'Line Size' property that controls how many locations ("lines") of memory are accessed at a time. Setting 'Line Size' to 'Single' is the simplest case: at most one location is accessed at a time, and there is one output labeled D. When 'Line Size' is set to 'Dual', however, the ROM component reads two locations simultaneously, and there are two outputs, labeled D and 1. In 'Quad' mode, ROM will read four locations, with four databuses labeled D, 1, 2, and 3. The addresses accessed are all consective: for 'Dual' line mode, ROM will access addresses A and A+1; for 'Quad' line mode, ROM will access addresses A, A+1, A+2, and A+3.
In 'Dual' and 'Quad' line modes, the selected address must be aligned to a multiple of 2 or 4, respectively. There is no support for mis-aligned accesses. This means the lowest bit or lowest two bits of the address must always be zero in those modes. If the address is mis-aligned the ROM will output all error (E) values instead of loading data from the ROM contents.
The decision to omit support in Logisim for mis-aligned addresses is deliberate. Support for mis-aligned addresses is not trivial in many actual scenarios: a memory chip may require multiple row accesses, for example, in order to perform a mis-aligned read. In addition, FPGA synthesis is substantially simpler when mis-aligned addresses are not permitted.
When the component is selected or being added,
the digits '0' through '9' alter its Address Bit Width
property
and Alt-0 through Alt-9 alter its Data Bit Width
property.
Clicking the ROM component brings keyboard and mouse focus to the ROM (indicated by a red rectangle), allowing for the contents to be viewed or edited. Because Poke Tool editing all takes place within a very small space, the interface for this is severely but necessarily constrained. For all but the simplest editing, it is more convenient to right-click the ROM and select "Edit Contents..." to bring up the integrated hex editor.
The Poke Tool has two modes of operation: You can edit the address displayed, and you can edit an individual value at some memory location.
Editing Addresses: Use the Poke Tool and click anywhere within the memory component but outside the gray box holding the memory contents. Logisim will draw a red rectangle around the address at the upper left corner. From here:
Typing R or r will clear the contents of memory.
Typing hex digits will change the address (assuming the new address isn't too large) and scroll the memory contents to show that address.
Scrolling with the mouse wheel increments or decrements the address and scrolls the memory forward or backward.
The Down (or Enter) key will increment the address and scroll the memory contents forward by one row.
The Up (or Backspace or Delete) keys will also increment or decrement the address to key will decrement the address and scroll the memory contents backwards by one row.
The Page Down (or Space) and Page Up keys will increment or decrement the address to scroll the memory contents forward or backward by one full page.
Editing Contents: Use the Poke Tool and click anywhere within the memory component within the gray box holding the memory contents. Logisim will draw a red rectangle around the memory cell currently being edited. From here:
Typing R or r will clear the contents of memory.
Typing hex digits will change the contents of that cell.
Scrolling with the mouse wheel moves up or down to an adjacent memory cell.
The Up, Down, Left, and Right arrow keys move to an adjacent memory cell.
The Page Up and Page Down keys move up or down by a full page.
The Backspace (or Delete) and Tab (or Space) keys similarly move to the previous or next memory cell.
Supports VHDL and Verilog synthesis. With Verilog, only 'Single' line mode is supported.
